Molybdenum disulphide (MoS
2)
has emerged as a promising candidate for low-power digital applications.
However, grain boundaries play a decisive role in determining the carrier
mobility and performance of MoS
2-FETs. In this work, we report a
systematic study on the grain boundary of chemical vapor deposition (CVD) MoS
2. We found that in the
ON-state, if current flows across a grain boundary that is aligned
perpendicular to the channel length, the current of CVD MoS
2-FETs
can be significantly reduced, while in the OFF-state, the effect is negligible.
Metal-insulator-transition is clearly observed, indicating the high quality of our CVD samples, and
it is also shown that grain boundaries increase the metal-insulator-transition
crossover-voltage in MoS
2-FETs. Thereby, this work provides useful
information and guidance in understanding the nature of carrier transport in
synthesized MoS
2 devices, and the developed framework can be applied
to other 2
D semiconductors in general, as well as in optimizing the CVD
process and device design with 2
D materials.